#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#

comment "Polarfire Configuration Options"

choice
	prompt "MPFS Chip Selection"
	default ARCH_CHIP_MPFS250T_FCVG484
	depends on ARCH_CHIP_MPFS

config ARCH_CHIP_MPFS250T_FCVG484
	bool "MPFS250T_FCVG484"
	---help---
		MPFS250T 484, 19x19x0.8 mm package

config ARCH_CHIP_MPFS250T_FCG484
	bool "MPFS250T_FCG484"
	---help---
		MPFS250T 484, 23x23x1 mm package

config ARCH_CHIP_MPFS250T_FCSG325
	bool "MPFS250T_FCSG325"
	---help---
		MPFS250T 325, 11x11 / 11x14.5, 0.5 mm package

config ARCH_CHIP_MPFS250T_FCSG536
	bool "MPFS250T_FCSG536"
	---help---
		MPFS250T 536, 16x16x0.5 mm package

endchoice # MPFS Chip Selection

config MPFS_ENABLE_DPFPU
	bool "MPFS DP_FPU Support"
	default n
	select ARCH_HAVE_FPU
	select ARCH_HAVE_DPFPU
	---help---
		Enable the RISC-V Double-Precision Floating Point Unit (DP-FPU).

config MPFS_BOOTLOADER
	bool "Initialize HW"
	default n
	---help---
		This NuttX image is used as a bootloader, which will boot only on one hart, putting the others in WFI

config IRQ_NSTACKS
	int
	depends on MPFS_BOOTLOADER
	default 5

config MPFS_OPENSBI
        bool "Use OpenSBI"
        depends on MPFS_BOOTLOADER && OPENSBI
        default n
        ---help---
                This uses a ld-envm-opensbi.script linker script and the mpfs_opensbi.c code to use external OpenSBI.

config MPFS_HART0_SBI
	bool "HART0 boots via SBI"
	depends on MPFS_OPENSBI
	default n

config MPFS_HART1_SBI
	bool "HART1 boots via SBI"
	depends on MPFS_OPENSBI
	default n

config MPFS_HART2_SBI
	bool "HART2 boots via SBI"
	depends on MPFS_OPENSBI
	default n

config MPFS_HART3_SBI
	bool "HART3 boots via SBI"
	depends on MPFS_OPENSBI
	default n

config MPFS_HART4_SBI
	bool "HART4 boots via SBI"
	depends on MPFS_OPENSBI
	default n

config MPFS_HART0_ENTRYPOINT
	hex "Application entry point for HART0"
	depends on MPFS_BOOTLOADER
	default 0xffffffffffffffff
	---help---
		The default address of the entry point for HART0

config MPFS_HART1_ENTRYPOINT
	hex "Application entry point for HART1"
	depends on MPFS_BOOTLOADER
	default 0xffffffffffffffff
	---help---
		The default address of the entry point for HART1

config MPFS_HART2_ENTRYPOINT
	hex "Application entry point for HART2"
	depends on MPFS_BOOTLOADER
	default 0xafb00000
	---help---
		The default address of the entry point for HART2

config MPFS_HART3_ENTRYPOINT
	hex "Application entry point for HART3"
	depends on MPFS_BOOTLOADER
	default 0xffffffffffffffff
	---help---
		The default address of the entry point for HART3

config MPFS_HART4_ENTRYPOINT
	hex "Application entry point for HART4"
	depends on MPFS_BOOTLOADER
	default 0xffffffffffffffff
	---help---
		The default address of the entry point for HART4

config MPFS_BOOT_HART
	int "HART used for booting"
	depends on MPFS_BOOTLOADER
	default 0
	---help---
		The HART number which does the HW initialiization and wakes up the other harts (Default 0, E51 core)

config MPFS_DDR_INIT
	bool "Initialize DDR"
	default n
	---help---
		Initializes and performs DDR training on the associated DDR memory.

config MPFS_EMMCSD_MUX_GPIO
	bool "GPIO driven EMMCSD mux"
	default n
	---help---
		External mux GPIO between e.MMC and SD-card

config MPFS_ROMFS_MOUNT
	bool "Mount the ROMFS file system"
	depends on FS_ROMFS
	default n
	---help---
		Mount a ROMFS image to /bin mount point. The image must be placed into
		<arch/board/boot_romfsimg.h>

menu "MPFS Peripheral Support"

# These "hidden" settings determine whether a peripheral option is available
# for the selected MCU

config MPFS_HAVE_UART0
	bool
	default n
	select UART0_SERIALDRIVER
	select ARCH_HAVE_SERIAL_TERMIOS

config MPFS_HAVE_UART1
	bool
	default n
	select UART1_SERIALDRIVER
	select ARCH_HAVE_SERIAL_TERMIOS

config MPFS_HAVE_UART2
	bool
	default n
	select UART2_SERIALDRIVER
	select ARCH_HAVE_SERIAL_TERMIOS

config MPFS_HAVE_UART3
	bool
	default n
	select UART3_SERIALDRIVER
	select ARCH_HAVE_SERIAL_TERMIOS

config MPFS_HAVE_UART4
	bool
	default n
	select UART4_SERIALDRIVER
	select ARCH_HAVE_SERIAL_TERMIOS

# These are the peripheral selections proper

config MPFS_SPI0
	bool "SPI 0"
	default n

config MPFS_SPI1
	bool "SPI 1"
	default n

config MPFS_UART0
	bool "UART 0"
	default n
	select ARCH_HAVE_UART0
	select ARCH_HAVE_SERIAL_TERMIOS
	select MPFS_HAVE_UART0

config MPFS_UART1
	bool "UART 1"
	default n
	select ARCH_HAVE_UART1
	select ARCH_HAVE_SERIAL_TERMIOS
	select MPFS_HAVE_UART1

config MPFS_UART2
	bool "UART 2"
	default n
	select ARCH_HAVE_UART2
	select ARCH_HAVE_SERIAL_TERMIOS
	select MPFS_HAVE_UART2

config MPFS_UART3
	bool "UART 3"
	default n
	select ARCH_HAVE_UART3
	select ARCH_HAVE_SERIAL_TERMIOS
	select MPFS_HAVE_UART3

config MPFS_UART4
	bool "UART 4"
	default n
	select ARCH_HAVE_UART4
	select ARCH_HAVE_SERIAL_TERMIOS
	select MPFS_HAVE_UART4

config MPFS_I2C0
	bool "I2C 0"
	select ARCH_HAVE_I2CRESET
	default n

config MPFS_I2C1
	bool "I2C 1"
	select ARCH_HAVE_I2CRESET
	default n

config MPFS_EMMCSD
	bool "EMMCSD"
	select ARCH_HAVE_SDIO
	select SDIO_BLOCKSETUP
	select SDIO_DMA
	default n
	---help---
		Selects the MPFS eMMCSD driver.

comment "CorePWM Options"

config MPFS_HAVE_COREPWM
	bool "CorePWM FPGA IP block configured"
	default n

config MPFS_COREPWM0
	bool "CorePWM0 FPGA IP block configured"
	default n
	select PWM_MULTICHAN
	depends on MPFS_HAVE_COREPWM

config MPFS_COREPWM0_BASE
	hex "Base address for the instance"
	default 0x44000000
	depends on MPFS_COREPWM0

config MPFS_COREPWM0_PWMCLK
	int "Clock frequency of the CorePWM0 block (Hz)"
	default 25000000
	range 1000000 100000000
	depends on MPFS_COREPWM0

config MPFS_COREPWM0_REGWIDTH
	int "Width of the PWM register (8, 16 or 32 bits)"
	default 32
	range 8 32
	depends on MPFS_COREPWM0

config MPFS_COREPWM0_NCHANNELS
	int "Number of Output Channels for CorePWM0"
	default 8
	range 1 16
	depends on MPFS_COREPWM0

config MPFS_COREPWM1
	bool "CorePWM1 FPGA IP block configured"
	default n
	select PWM_MULTICHAN
	depends on MPFS_HAVE_COREPWM

config MPFS_COREPWM1_BASE
	hex "Base address for the instance"
	default 0x45000000
	depends on MPFS_COREPWM1

config MPFS_COREPWM1_PWMCLK
	int "Clock frequency of the CorePWM1 block (Hz)"
	default 25000000
	range 1000000 100000000
	depends on MPFS_COREPWM1

config MPFS_COREPWM1_REGWIDTH
	int "Width of the PWM register (8, 16 or 32 bits)"
	default 32
	range 8 32
	depends on MPFS_COREPWM1

config MPFS_COREPWM1_NCHANNELS
	int "Number of Output Channels for CorePWM1"
	default 2
	range 1 16
	depends on MPFS_COREPWM1

endmenu

config MPFS_DMA
	bool "MPFS DMA (PDMA)"
	default n
	select ARCH_DMA
	---help---
		Enable DMA Support. MPFS DMA is Memory-to-Memory only.

menu "MPFS Others"

endmenu

# Override the default values for MPU / PMP parameters here

config ARCH_MPU_MIN_BLOCK_SIZE
	default 4096

config ARCH_MPU_HAS_TOR
	default n

config ARCH_MPU_HAS_NO4
	default n

config ARCH_MPU_HAS_NAPOT
	default y
